2010-12-08

[ZT][verilog]task and function-27

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Tasks and functions can be used to in much the same manner but there are some important differences that must be noted.
Functions

A function is unable to enable a task however functions can enable other functions.
A function will carry out its required duty in zero simulation time.  
Within a function, no event, delay or timing control statements are permitted.
In the invocation of a function there must be at least one argument to be passed.
Functions will only return a single value and cannot use either output or inout statements.
Functions are synthesysable.
Disable statements cannot be used.
Function cannot have nonblocking statements.

EXAMPLE:function

module   function_calling(a, b,c);
                  
    input a, b ;
    output c;
    wire c;
       
    function   myfunction;
    input a, b;
    begin
         myfunction = (a+b);
    end
    endfunction
   
    assign c =   myfunction (a,b);
         
endmodule



Task

Tasks are capable of enabling a function as well as enabling other versions of a Task
Tasks also run with a zero simulation however they can if required be executed in a non zero simulation time.
Tasks are allowed to contain any of these statements.
A task is allowed to use zero or more arguments which are of type output, input or inout.
A Task is unable to return a value but has the facility to pass multiple values via the output and inout statements.
Tasks are not synthesisable.
Disable statements can be used.

EXAMPLE:task
module traffic_lights;
    reg clock, red, amber, green;
    parameter on = 1, off = 0, red_tics = 350,
     amber_tics = 30, green_tics = 200;

    initial red = off;
    initial amber = off;
    initial green = off;

    always begin // sequence to control the lights.
         red = on; // turn red light on
         light(red, red_tics); // and wait.
         green = on; // turn green light on
         light(green, green_tics); // and wait.
         amber = on; // turn amber light on
         light(amber, amber_tics); // and wait.
    end
    // task to wait for tics positive edge clocks
    // before turning color light off.
    task light;
    output color;
    input [31:0] tics;
    begin
        repeat (tics) @ (posedge clock);
         color = off; // turn light off.
    end
    endtask

    always begin // waveform for the clock.
        #100 clock = 0;
        #100 clock = 1;
    end
endmodule // traffic_lights.


Task And Function Queries:


Why a function cannot call a task?
As functions does not consume time, it can do any operation which does not consume time. Mostly tasks are written which consumes time. So a task call inside a function blocks the further execution of function utile it finished. But it<92>s not true. A function can call task if the task call consumes zero time, but the IEEE LRM doesn't allow.

Why tasks are not synthesized?
Wrong question! Tasks can be synthesized if it doesn't consume time.

Why a function should return a value?
There is no strong reason for this in Verilog. This restriction is removed in SystemVerilog.

Why a function should have at least one input?
There is no strong reason for this in verilog. I think this restriction is not removed fin SystemVerilog. Some requirements where the inputs are taken from the global signal, those functions don<92>t need any input. A work around is to use a dummy input. If you have a better reason, just mail me at gopi@testbench.in

Why a task cannot return a value?
If tasks can return values, then Lets take a look at the following example.

A=f1(B)+f2(C);
and f1 and f2 had delays of say 5 and 10? When would B and C be sampled, or global inside f1 and f2 be sampled? How long does then entire statement block? This is going to put programmers in a bad situation. So languages gurus made that tasks can't return .

Why a function cannot have delays?
The answer is same as above. But in Open Vera, delays are allowed in function. A function returns a value and therefore can be used as a part of any expression. This does not allow any delay in the function.  


Why disable statements are not allowed in functions?
If disable statement is used in function, it invalids the function and its return value. So disable statements are not allowed in function.

Constant Function:

Constant function calls are used to support the building of complex calculations of values at elaboration time. A constant function call shall be a function invocation of a constant function local to the calling module where the arguments to the function are constant expressions.


EXAMPLE:constant function.
module ram_model (address, write, chip_select, data);
     parameter data_width = 8;
     parameter ram_depth = 256;
     localparam adder_width = clogb2(ram_depth);
     input [adder_width - 1:0] address;
     input write, chip_select;
     inout [data_width - 1:0] data;

     //define the clogb2 function
     function integer clogb2;
     input depth;
     integer i,result;
     begin
        for (i = 0; 2 ** i < depth; i = i + 1)
         result = i + 1;
         clogb2 = result;
     end
endfunction

Reentrant Tasks And Functions:

Tasks and functions without the optional keyword automatic are static , with all declared items being statically allocated. These items shall be shared across all uses of the task and functions executing concurrently. Task and functions with the optional keyword automatic are automatic tasks and functions. All items declared inside automatic tasks and functions   are allocated dynamically for each invocation. Automatic task items and function items cannot be accessed by hierarchical references.


EXAMPLE:

module auto_task();

task automatic disp;
   input integer a;
   input integer d;
   begin
       #(d) $display("%t d is %d a is %d", $time,d,a);
   end
endtask

initial 
#10 disp(10,14);
  
initial 
#14 disp(23,18);

initial 
#4 disp(11,14);


initial
#100  $finish;

endmodule
RESULTS:

18 d is 14 a is 11
24 d is 14 a is 10
32 d is 18 a is 23


EXAMPLE:
module tryfact;
     // define the function
     function automatic integer factorial;
         input [31:0] operand;
         integer i;
         if (operand >= 2)
             factorial = factorial (operand - 1) * operand;
         else
             factorial = 1;
     endfunction
     // test the function
     integer result;
     integer n;
     initial begin
         for (n = 0; n <= 7; n = n+1) begin
             result = factorial(n);
             $display("%0d factorial=%0d", n, result);
         end
     end
endmodule // tryfact

RESULTS:

0 factorial=1
1 factorial=1
2 factorial=2
3 factorial=6
4 factorial=24
5 factorial=120
6 factorial=720
7 factorial=5040

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